2017 ASEE Annual Conference & Exposition

“Digital Systems” is a core course taken by Electrical/Computer Engineering (ECE) as well as Computer Science students worldwide. This course is a must to understand the basics of hardware architecture of revolutionizing microprocessors that are ever-increasingly and inevitably entering our lives specially in the era of IoT, the internet of things.
In “Digital Systems”, “laboratory work” is an irreplaceable portion, where students learn how to physically build circuits. This may be done in different ways: Students place off-the-shelf chips on a breadboard, and wire them up manually. The more sophisticated the circuit is, the more chips, time and space are used. Or, students use the cutting edge technology, Field Programmable Gate Array (FPGA), but first they should learn a hardware description language, e.g. VHDL, to write the right code to describe their circuit. Students then use CAD tools to compile and map their code into a FPGA chip, which amazingly takes only a couple seconds!
Teaching a first course in VHDL to sophomores is a challenge. Unlike software programming languages, such as C, that ECE students learn in the first year of college, VHDL is a so-called concurrent language; students should understand what concurrency means in this context.
There is a second reason that makes it a challenge to incorporate VHDL in “Digital Systems”: VHDL is added on top of a course that used to be taught in one academic term by itself. Therefore, topic scheduling becomes more crucial specially if academic terms, such as ours, are only 10 weeks long.
VHDL is a big language; so the third challenge in teaching VHDL is to decide what to teach. We have crafted a 9-chapter manuscript for “Digital Systems”. There are two parts in each of Chapters 3 through 9. Students learn digital systems’ theory in Parts I. VHDL modelling and FPGA synthesis of digital systems are covered in Parts II. In a 10-week academic term, our students additionally perform 9 lab assignments out of which 7 are VHDL-based.
In this paper, we present our VHDL teaching method and experience as well as the materials’ summary, which are based on Parts II of our manuscript and 7 VHDL-based lab assignments. The topics are summarized here:
• Getting Started …
• Hierarchical Designs and Structural Modeling
• Generate Statements and Generic Constructs
• Behavioral Modeling
Selected and Conditional Signal Assignments
• Behavioral Modeling
Process Constructs
• VHDL Modeling of State Machines
• Register Transfers: The Backbone of Digital Systems